Zfhmin Instructions
4 RISC-V instructions in this extension - click any row for encoding, pseudocode, and full documentation.
| Mnemonic | Syntax | Format | Summary |
|---|---|---|---|
| FCVT.H.S | FCVT.H.S rd, rs1 | I-Type (Float) | Converts a 32-bit single-precision float to a 16-bit half-precision float. |
| FCVT.S.H | FCVT.S.H rd, rs1 | I-Type (Float) | Converts a 16-bit half-precision float to a 32-bit single-precision float. |
| FLH | FLH rd, offset(rs1) | I-Type | Loads a 16-bit half-precision float from memory. |
| FSH | FSH rs2, offset(rs1) | S-Type | Stores a 16-bit half-precision float to memory. |