| ABS |
ABS Wd, Wn |
|
Absolute Value |
| ABS |
ABS Zd.S, Pg/M, Zn.S |
|
Absolute Value |
| ADD |
ADD Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Integer Add |
| ADD |
ADD { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Integer Add |
| ADDHNB |
ADDHNB Zd.B, Zn.H, Zm.H |
|
Add Narrow High (Bottom) |
| ADDHNT |
ADDHNT Zd.B, Zn.H, Zm.H |
|
Add Narrow High (Top) |
| ADDP |
ADDP Zd.S, Pn/M, Zn.S, Zm.S |
|
Add Pairwise |
| ADR |
ADR Zd.D, [Xn, Zm.D] |
|
Compute Vector of Addresses |
| AESD |
AESD Zd.B, Zd.B, Zn.B |
|
AES Decryption |
| AESE |
AESE Zd.B, Zd.B, Zn.B |
|
AES Encryption |
| AESIMC |
AESIMC Zd.B, Zd.B |
|
AES Inverse Mix Columns |
| AESMC |
AESMC Zd.B, Zd.B |
|
AES Mix Columns |
| AND |
AND Zd.D, Pg/M, Zd.D, Zm.D |
|
Predicated Bitwise AND |
| AND |
AND Zd.D, Zn.D, Zm.D |
|
Bitwise AND (Vector) |
| ANDS |
ANDS Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate AND (Set Flags) |
| ANDV |
ANDV Sd, Pg, Zn.S |
|
Bitwise AND Reduction |
| ASR |
ASR Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Arithmetic Shift Right |
| ASR |
ASR Zd.D, Zn.D, Zm.D |
|
Arithmetic Shift Right (Vector) |
| ASRD |
ASRD Zd.S, Pg/M, Zd.S, #<imm> |
|
Arithmetic Shift Right for Divide |
| BDEP |
BDEP Zd.D, Zn.D, Zm.D |
|
Bit Deposit |
| BEXT |
BEXT Zd.D, Zn.D, Zm.D |
|
Bit Extract |
| BFCVT |
BFCVT Zd.H, Pg/M, Zn.S |
|
BFloat16 Convert from Float |
| BFCVTNT |
BFCVTNT Zd.H, Pg/M, Zn.S |
|
BFloat16 Convert Narrow (Top) |
| BFDOT |
BFDOT Zd.S, Zn.H, Zm.H |
|
BFloat16 Dot Product |
| BFMLA |
BFMLA { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector BFloat16 Multiply-Add |
| BFMLALB |
BFMLALB Zd.S, Zn.H, Zm.H |
|
BFloat16 Multiply-Add Long (Bottom) |
| BFMLALT |
BFMLALT Zd.S, Zn.H, Zm.H |
|
BFloat16 Multiply-Add Long (Top) |
| BFMMLA |
BFMMLA Zd.S, Zn.H, Zm.H |
|
BFloat16 Matrix Multiply-Add |
| BGRP |
BGRP Zd.D, Zn.D, Zm.D |
|
Bit Group |
| BIC |
BIC Zd.D, Pg/M, Zd.D, Zm.D |
|
Predicated Bitwise Clear |
| BIC |
BIC Zd.D, Zn.D, Zm.D |
|
Bitwise Clear (Vector) |
| BICS |
BICS Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate Bitwise Clear (Set Flags) |
| BRKA |
BRKA Pd.B, Pg/Z, Pn.B |
|
Break After First True Condition |
| BRKB |
BRKB Pd.B, Pg/Z, Pn.B |
|
Break Before First True Condition |
| BRKN |
BRKN Pd.B, Pg/Z, Pn.B, Pm.B |
|
Break to Next Partition |
| BSL1N |
BSL1N Zd.D, Zn.D, Zm.D, Zk.D |
|
Bitwise Select with 1st Inverted |
| BSL2N |
BSL2N Zd.D, Zn.D, Zm.D, Zk.D |
|
Bitwise Select with 2nd Inverted |
| BTI |
BTI <target> |
|
Branch Target Identification |
| CADD |
CADD Zd.S, Zn.S, Zm.S, #<rot> |
|
Complex Integer Add with Rotate |
| CDOT |
CDOT Zd.S, Zn.B, Zm.B, #<rot> |
|
Complex Integer Dot Product |
| CLASTA |
CLASTA Wd, Pg, Wd, Zn.S |
|
Conditionally Extract Last Element (After) |
| CLASTB |
CLASTB Wd, Pg, Wd, Zn.S |
|
Conditionally Extract Last Element (Before) |
| CLRBHB |
CLRBHB |
|
Clear Branch History Buffer |
| CLS |
CLS Zd.S, Pg/M, Zn.S |
|
Count Leading Sign Bits |
| CLZ |
CLZ Zd.S, Pg/M, Zn.S |
|
Count Leading Zeros |
| CMLA |
CMLA Zd.S, Zn.S, Zm.S, #<rot> |
|
Complex Integer Multiply-Add with Rotate |
| CMPEQ |
CMPEQ Pd.S, Pg/Z, Zn.S, Zm.S |
|
Integer Compare Equal |
| CMPGE |
CMPGE Pd.S, Pg/Z, Zn.S, Zm.S |
|
Integer Compare Greater Equal |
| CMPGT |
CMPGT Pd.S, Pg/Z, Zn.S, Zm.S |
|
Integer Compare Greater Than |
| CMPLE |
CMPLE Pd.S, Pg/Z, Zn.S, Zm.S |
|
Integer Compare Less Equal |
| CMPLT |
CMPLT Pd.S, Pg/Z, Zn.S, Zm.S |
|
Integer Compare Less Than |
| CMPNE |
CMPNE Pd.S, Pg/Z, Zn.S, Zm.S |
|
Integer Compare Not Equal |
| CNOT |
CNOT Zd.S, Pg/M, Zn.S |
|
Logical Negate (Condition) |
| CNT |
CNT Wd, Wn |
|
Population Count (Scalar) |
| CNTB |
CNTB Xd |
|
Count Bytes in Vector |
| CNTD |
CNTD Xd |
|
Count Doublewords in Vector |
| CNTH |
CNTH Xd |
|
Count Halfwords in Vector |
| CNTP |
CNTP Xd, Pg, Pn.S |
|
Count Active Elements in Predicate |
| CNTW |
CNTW Xd |
|
Count Words in Vector |
| COMPACT |
COMPACT Zd.S, Pg, Zn.S |
|
Compact Vector Elements |
| CPYE |
CPYE [Xd]!, [Xn]!, Xm! |
|
Memory Copy Epilogue |
| CPYM |
CPYM [Xd]!, [Xn]!, Xm! |
|
Memory Copy Main |
| CPYP |
CPYP [Xd]!, [Xn]!, Xm! |
|
Memory Copy Prologue |
| CTZ |
CTZ Wd, Wn |
|
Count Trailing Zeros |
| CTerm |
CTERM <cond>, <Rn>, <Rm> |
|
Compare and Terminate |
| DUP |
DUP Zd.S, #<imm> |
|
Duplicate Immediate |
| EOR |
EOR Zd.D, Pg/M, Zd.D, Zm.D |
|
Predicated Bitwise Exclusive OR |
| EOR |
EOR Zd.D, Zn.D, Zm.D |
|
Bitwise Exclusive OR (Vector) |
| EOR3 |
EOR3 Zd.D, Zn.D, Zm.D, Zk.D |
|
Exclusive OR of Three Vectors |
| EORS |
EORS Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate XOR (Set Flags) |
| EORV |
EORV Sd, Pg, Zn.S |
|
Bitwise Exclusive OR Reduction |
| EXT |
EXT Zd.B, Zn.B, Zm.B, #<imm> |
|
Extract Vector |
| FABS |
FABS Zd.S, Pg/M, Zn.S |
|
Floating-point Absolute |
| FADD |
FADD Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Add |
| FADD |
FADD { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Floating-point Add |
| FADDA |
FADDA Vd, Pg, Vn, Zm.S |
|
Floating-point Add Across Vector |
| FADDP |
FADDP Zd.S, Pn/M, Zn.S, Zm.S |
|
Floating-point Add Pairwise |
| FADDV |
FADDV Hd, Pg, Zn.H |
|
Floating-point Add Reduction |
| FCADD |
FCADD Zd.S, Pg/M, Zn.S, Zm.S, #<rot> |
|
Floating-point Complex Add with Rotate |
| FCLAMP |
FCLAMP Zd.S, Zn.S, Zm.S |
|
Floating-point Clamp |
| FCMEQ |
FCMEQ Pd.S, Pg/Z, Zn.S, Zm.S |
|
Floating-point Compare Equal |
| FCMGE |
FCMGE Pd.S, Pg/Z, Zn.S, Zm.S |
|
Floating-point Compare Greater Equal |
| FCMGT |
FCMGT Pd.S, Pg/Z, Zn.S, Zm.S |
|
Floating-point Compare Greater Than |
| FCMLA |
FCMLA Zd.S, Pg/M, Zn.S, Zm.S, #<rot> |
|
Floating-point Complex Multiply-Add with Rotate |
| FCMLE |
FCMLE Pd.S, Pg/Z, Zn.S, Zm.S |
|
Floating-point Compare Less Equal |
| FCMLT |
FCMLT Pd.S, Pg/Z, Zn.S, Zm.S |
|
Floating-point Compare Less Than |
| FCMNE |
FCMNE Pd.S, Pg/Z, Zn.S, Zm.S |
|
Floating-point Compare Not Equal |
| FCVT |
FCVT Zd.D, Pg/M, Zn.S |
|
Floating-point Convert Precision |
| FCVTX |
FCVTX Zd.S, Pg/M, Zn.D |
|
Floating-point Convert to Single (Exact) |
| FCVTXNT |
FCVTXNT Zd.S, Pg/M, Zn.D |
|
Floating-point Convert Narrow (Top) |
| FCVTZS |
FCVTZS Zd.S, Pg/M, Zn.S |
|
Float to Signed Int (Round towards Zero) |
| FCVTZU |
FCVTZU Zd.S, Pg/M, Zn.S |
|
Float to Unsigned Int (Round towards Zero) |
| FDIV |
FDIV Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Divide |
| FMAX |
FMAX Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Maximum |
| FMAXNM |
FMAXNM Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Max Number |
| FMAXNMP |
FMAXNMP Zd.S, Pn/M, Zn.S, Zm.S |
|
Floating-point Max Num Pairwise |
| FMAXNMV |
FMAXNMV Hd, Pg, Zn.H |
|
Floating-point MaxNum Reduction |
| FMAXP |
FMAXP Zd.S, Pn/M, Zn.S, Zm.S |
|
Floating-point Maximum Pairwise |
| FMAXV |
FMAXV Hd, Pg, Zn.H |
|
Floating-point Max Reduction |
| FMIN |
FMIN Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Minimum |
| FMINNM |
FMINNM Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Min Number |
| FMINNMP |
FMINNMP Zd.S, Pn/M, Zn.S, Zm.S |
|
Floating-point Min Num Pairwise |
| FMINNMV |
FMINNMV Hd, Pg, Zn.H |
|
Floating-point MinNum Reduction |
| FMINP |
FMINP Zd.S, Pn/M, Zn.S, Zm.S |
|
Floating-point Minimum Pairwise |
| FMINV |
FMINV Hd, Pg, Zn.H |
|
Floating-point Min Reduction |
| FMLA |
FMLA Zd.S, Pg/M, Zn.S, Zm.S |
|
Floating-point Multiply-Add |
| FMLA |
FMLA { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Floating-point Multiply-Add |
| FMLAL |
FMLAL Vd.4S, Vn.4H, Vm.4H |
|
Fused Multiply-Add Long (FP16) |
| FMLS |
FMLS Zd.S, Pg/M, Zn.S, Zm.S |
|
Floating-point Multiply-Subtract |
| FMLS |
FMLS { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Floating-point Multiply-Subtract |
| FMUL |
FMUL Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Multiply |
| FMUL |
FMUL { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Floating-point Multiply |
| FNEG |
FNEG Zd.S, Pg/M, Zn.S |
|
Floating-point Negate |
| FNMLA |
FNMLA Zd.S, Pg/M, Zn.S, Zm.S |
|
Floating-point Negated Multiply-Add |
| FNMLS |
FNMLS Zd.S, Pg/M, Zn.S, Zm.S |
|
Floating-point Negated Multiply-Subtract |
| FRECPE |
FRECPE Zd.S, Zn.S |
|
Floating-point Reciprocal Estimate |
| FRECPS |
FRECPS Zd.S, Zn.S, Zm.S |
|
Floating-point Reciprocal Step |
| FRECPX |
FRECPX Zd.S, Pg/M, Zn.S |
|
Floating-point Reciprocal Exponent |
| FRINTA |
FRINTA Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Away) |
| FRINTI |
FRINTI Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Current) |
| FRINTM |
FRINTM Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Minus Infinity) |
| FRINTN |
FRINTN Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Nearest) |
| FRINTP |
FRINTP Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Plus Infinity) |
| FRINTX |
FRINTX Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Exact) |
| FRINTZ |
FRINTZ Zd.S, Pg/M, Zn.S |
|
FP Round to Integral (Zero) |
| FRSQRTE |
FRSQRTE Zd.S, Zn.S |
|
Floating-point Reciprocal Sqrt Estimate |
| FRSQRTS |
FRSQRTS Zd.S, Zn.S, Zm.S |
|
Floating-point Reciprocal Sqrt Step |
| FSCALE |
FSCALE Zd.S, Pg/M, Zd.S, Zm.S |
|
Floating-point Scale |
| FSQRT |
FSQRT Zd.S, Pg/M, Zn.S |
|
Floating-point Square Root |
| FSUB |
FSUB Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Floating-point Subtract |
| FSUB |
FSUB { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Floating-point Subtract |
| FTSMUL |
FTSMUL Zd.S, Zn.S, Zm.S |
|
FP Trig Starting Value Multiply |
| FTSSEL |
FTSSEL Zd.S, Zn.S, Zm.S |
|
FP Trig Starting Value Select |
| GMI |
GMI Xd, Xn, Xm |
|
Tag Mask Insert |
| HISTCNT |
HISTCNT Zn.S, Pg/Z, Zm.S |
|
Histogram Count |
| HISTSEG |
HISTSEG Zd.B, Zn.B, Zm.B |
|
Histogram Segment |
| INDEX |
INDEX Zd.S, Wn, Wm |
|
Create Index Vector |
| INSR |
INSR Zd.S, Wn |
|
Insert Scalar into Vector |
| IRG |
IRG Xd, Xn, {Xm} |
|
Insert Random Tag |
| LAZY |
LAZY <op>, <tile> |
|
Lazy Save/Restore |
| LD1B |
LD1B { Zt.S }, Pg/Z, [Xn, Zm.S, UXTW] |
|
Gather Load (Byte) |
| LD1D |
LD1D { Zt.D }, Pg/Z, [Xn, Zm.D, LSL #3] |
|
Gather Load (Double) |
| LD1H |
LD1H { Zt.S }, Pg/Z, [Xn, Zm.S, UXTW #1] |
|
Gather Load (Half) |
| LD1W |
LD1W { Zt.S }, Pg/Z, [Xn, Zm.S, UXTW #2] |
|
Gather Load (Word) |
| LD2B |
LD2B { Zt1.B, Zt2.B }, Pg/Z, [Xn] |
|
Load 2-element Structure (Byte) |
| LD2D |
LD2D { Zt1.D, Zt2.D }, Pg/Z, [Xn] |
|
Load 2-element Structure (Double) |
| LD2H |
LD2H { Zt1.H, Zt2.H }, Pg/Z, [Xn] |
|
Load 2-element Structure (Half) |
| LD2W |
LD2W { Zt1.S, Zt2.S }, Pg/Z, [Xn] |
|
Load 2-element Structure (Word) |
| LD3B |
LD3B { Zt1.B, Zt2.B, Zt3.B }, Pg/Z, [Xn] |
|
Load 3-element Structure (Byte) |
| LD3D |
LD3D { Zt1.D, Zt2.D, Zt3.D }, Pg/Z, [Xn] |
|
Load 3-element Structure (Double) |
| LD3H |
LD3H { Zt1.H, Zt2.H, Zt3.H }, Pg/Z, [Xn] |
|
Load 3-element Structure (Half) |
| LD3W |
LD3W { Zt1.S, Zt2.S, Zt3.S }, Pg/Z, [Xn] |
|
Load 3-element Structure (Word) |
| LD4B |
LD4B { Zt1.B-Zt4.B }, Pg/Z, [Xn] |
|
Load 4-element Structure (Byte) |
| LD4D |
LD4D { Zt1.D-Zt4.D }, Pg/Z, [Xn] |
|
Load 4-element Structure (Double) |
| LD4H |
LD4H { Zt1.H-Zt4.H }, Pg/Z, [Xn] |
|
Load 4-element Structure (Half) |
| LD4W |
LD4W { Zt1.S-Zt4.S }, Pg/Z, [Xn] |
|
Load 4-element Structure (Word) |
| LD64B |
LD64B Wd, [Xn] |
|
Single-copy Atomic Load (64-byte) |
| LDFF1B |
LDFF1B { Zt.B }, Pg/Z, [Xn] |
|
Load First-Faulting (Byte) |
| LDFF1D |
LDFF1D { Zt.D }, Pg/Z, [Xn] |
|
Load First-Faulting (Double) |
| LDFF1H |
LDFF1H { Zt.H }, Pg/Z, [Xn] |
|
Load First-Faulting (Half) |
| LDFF1W |
LDFF1W { Zt.S }, Pg/Z, [Xn] |
|
Load First-Faulting (Word) |
| LDG |
LDG Xt, [Xn, #<simm>] |
|
Load Allocation Tag |
| LDGM |
LDGM Xn, Xm |
|
Load Tag Multiple |
| LDNT1B |
LDNT1B { Zt.B }, Pg/Z, [Xn] |
|
Load Non-Temporal (Byte) |
| LDNT1D |
LDNT1D { Zt.D }, Pg/Z, [Xn] |
|
Load Non-Temporal (Double) |
| LDNT1H |
LDNT1H { Zt.H }, Pg/Z, [Xn] |
|
Load Non-Temporal (Half) |
| LDNT1W |
LDNT1W { Zt.S }, Pg/Z, [Xn] |
|
Load Non-Temporal (Word) |
| LDR |
LDR Zt, [Xn, #<imm>] |
|
Load Vector |
| LDR (Pred) |
LDR Pt, [Xn, #<imm>] |
|
Load Predicate |
| LDR (Tile) |
LDR ZA[<Wv>, <imm>], [Xn, #<imm>, MUL VL] |
|
Load Multiple Vectors to Tile |
| LOGB |
LOGB Zd.S, Pg/M, Zn.S |
|
Floating-point Base 2 Logarithm |
| LSL |
LSL Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Logical Shift Left |
| LSL |
LSL Zd.D, Zn.D, Zm.D |
|
Logical Shift Left (Vector) |
| LSR |
LSR Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Logical Shift Right |
| LSR |
LSR Zd.D, Zn.D, Zm.D |
|
Logical Shift Right (Vector) |
| LUTI2 |
LUTI2 Zd.B, ZT0, Zn[<index>] |
|
Lookup Table (2-bit Index) |
| LUTI4 |
LUTI4 Zd.B, ZT0, Zn[<index>] |
|
Lookup Table (4-bit Index) |
| MAD |
MAD Zd.S, Pg/M, Zn.S, Zm.S |
|
Integer Multiply-Add (Destructive) |
| MATCH |
MATCH Pd.B, Pg/Z, Zn.B, Zm.B |
|
Detect Matches in Vector |
| MATCH |
MATCH Pd.B, Pg/Z, Zn.B, Zm.B |
|
Detect Matches |
| MLA |
MLA Zd.S, Pg/M, Zn.S, Zm.S |
|
Integer Multiply-Add |
| MLS |
MLS Zd.S, Pg/M, Zn.S, Zm.S |
|
Integer Multiply-Subtract |
| MOV |
MOV Zd.S, Pg/M, Zn.S |
|
Move (Predicated) |
| MOVA |
MOVA ZA.S[Wv, <imm>], Pg/M, Zn.S |
|
Move Vector to/from Tile Slice |
| MSB |
MSB Zd.S, Pg/M, Zn.S, Zm.S |
|
Integer Multiply-Subtract (Destructive) |
| MUL |
MUL Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Integer Multiply |
| MUL |
MUL { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Integer Multiply |
| NAND |
NAND Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate NAND |
| NBSL |
NBSL Zd.D, Zn.D, Zm.D, Zk.D |
|
Not Bitwise Select |
| NEG |
NEG Zd.S, Pg/M, Zn.S |
|
Negate |
| NMATCH |
NMATCH Pd.B, Pg/Z, Zn.B, Zm.B |
|
Detect No Matches |
| NOR |
NOR Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate NOR |
| NOT |
NOT Zd.S, Pg/M, Zn.S |
|
Bitwise NOT |
| ORN |
ORN Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate OR NOT |
| ORR |
ORR Zd.D, Pg/M, Zd.D, Zm.D |
|
Predicated Bitwise OR |
| ORR |
ORR Zd.D, Zn.D, Zm.D |
|
Bitwise OR (Vector) |
| ORRS |
ORRS Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate OR (Set Flags) |
| ORV |
ORV Sd, Pg, Zn.S |
|
Bitwise OR Reduction |
| PACGA |
PACGA Xd, Xn, Xm |
|
Pointer Auth Code, Generic Address |
| PFALSE |
PFALSE Pd |
|
Initialize Predicate False |
| PFIRST |
PFIRST Pd.B, Pg/Z, Pn.B |
|
Set First Active Element |
| PMULLB |
PMULLB Zd.D, Zn.S, Zm.S |
|
Polynomial Multiply Long (Bottom) |
| PMULLT |
PMULLT Zd.D, Zn.S, Zm.S |
|
Polynomial Multiply Long (Top) |
| PNEXT |
PNEXT Pd.B, Pg/Z, Pn.B |
|
Find Next Active Element |
| PRFB |
PRFB <prfop>, Pg, [Xn, Zm.S, UXTW] |
|
Prefetch Gather (Byte) |
| PRFD |
PRFD <prfop>, Pg, [Xn, Zm.D, LSL #3] |
|
Prefetch Gather (Double) |
| PRFH |
PRFH <prfop>, Pg, [Xn, Zm.S, UXTW #1] |
|
Prefetch Gather (Half) |
| PRFW |
PRFW <prfop>, Pg, [Xn, Zm.S, UXTW #2] |
|
Prefetch Gather (Word) |
| PSB |
PSB CSYNC |
|
Profiling Synchronization Barrier |
| PSEL |
PSEL Pd, Pn, Pm.S[<index>] |
|
Predicate Select |
| PTEST |
PTEST Pg, Pn.B |
|
Test Predicate |
| PTRUE |
PTRUE Pd.S, <pattern> |
|
Initialize Predicate True |
| PUNPKHI |
PUNPKHI Pd.H, Pn.B |
|
Unpack Predicate High |
| PUNPKLO |
PUNPKLO Pd.H, Pn.B |
|
Unpack Predicate Low |
| RADDHNB |
RADDHNB Zd.B, Zn.H, Zm.H |
|
Rounding Add Narrow High (Bottom) |
| RADDHNT |
RADDHNT Zd.B, Zn.H, Zm.H |
|
Rounding Add Narrow High (Top) |
| RAX1 |
RAX1 Vd.2D, Vn.2D, Vm.2D |
|
Rotate and XOR (SHA-3) |
| RDFFR |
RDFFR Pd.B |
|
Read First-Fault Register |
| RDVL |
RDVL Xd, #<imm> |
|
Read Vector Length |
| REV |
REV Zd.S, Zn.S |
|
Reverse Vector Elements |
| REVB |
REVB Zd.S, Pg/M, Zn.S |
|
Reverse Bytes in Elements |
| REVD |
REVD Zd.Q, Pg/M, Zn.Q |
|
Reverse Doublewords in Vector |
| REVH |
REVH Zd.S, Pg/M, Zn.S |
|
Reverse Halfwords in Elements |
| REVW |
REVW Zd.D, Pg/M, Zn.D |
|
Reverse Words in Elements |
| RSHRNB |
RSHRNB Zd.B, Zn.H, #<imm> |
|
Rounding Shift Right Narrow (Bottom) |
| RSHRNT |
RSHRNT Zd.B, Zn.H, #<imm> |
|
Rounding Shift Right Narrow (Top) |
| RSUBHNB |
RSUBHNB Zd.B, Zn.H, Zm.H |
|
Rounding Subtract Narrow High (Bottom) |
| RSUBHNT |
RSUBHNT Zd.B, Zn.H, Zm.H |
|
Rounding Subtract Narrow High (Top) |
| SABA |
SABA Zd.S, Zn.S, Zm.S |
|
Signed Absolute Difference Accumulate |
| SABD |
SABD Zd.S, Pg/M, Zn.S, Zm.S |
|
Signed Absolute Difference |
| SADDLB |
SADDLB Zd.D, Zn.S, Zm.S |
|
Signed Add Long (Bottom) |
| SADDLT |
SADDLT Zd.D, Zn.S, Zm.S |
|
Signed Add Long (Top) |
| SADDV |
SADDV Dd, Pg, Zn.S |
|
Signed Add Reduction |
| SB |
SB |
|
Speculation Barrier |
| SCLAMP |
SCLAMP Zd.S, Zn.S, Zm.S |
|
Signed Clamp |
| SCVTF |
SCVTF Zd.S, Pg/M, Zn.S |
|
Signed Int to Float Conversion |
| SDIV |
SDIV Zd.S, Pg/M, Zd.S, Zm.S |
|
Signed Integer Divide |
| SDIVR |
SDIVR Zd.S, Pg/M, Zd.S, Zm.S |
|
Signed Integer Divide Reverse |
| SEL |
SEL Zd.S, Pg, Zn.S, Zm.S |
|
Select Elements (Predicated) |
| SEL |
SEL Zd.D, Pg, Zn.D, Zm.D |
|
Select Elements (Vector) |
| SETFFR |
SETFFR |
|
Set First-Fault Register |
| SETM |
SETM [Xd]!, Xn!, Xm |
|
Memory Set Main |
| SETP |
SETP [Xd]!, Xn!, Xm |
|
Memory Set Prologue |
| SHADD |
SHADD Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Halving Add |
| SHRNB |
SHRNB Zd.B, Zn.H, #<imm> |
|
Shift Right Narrow (Bottom) |
| SHRNT |
SHRNT Zd.B, Zn.H, #<imm> |
|
Shift Right Narrow (Top) |
| SHSUB |
SHSUB Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Halving Subtract |
| SM3PARTW1 |
SM3PARTW1 Vd.4S, Vn.4S, Vm.4S |
|
SM3 Hash Part 1 |
| SM4E |
SM4E Vd.4S, Vn.4S |
|
SM4 Encryption |
| SM4EKEY |
SM4EKEY Vd.4S, Vn.4S, Vm.4S |
|
SM4 Key Generation |
| SMAX |
SMAX Wd, Wn, Wm |
|
Signed Maximum |
| SMAX |
SMAX Zd.S, Pg/M, Zn.S, Zm.S |
|
Signed Maximum |
| SMAXP |
SMAXP Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Maximum Pairwise |
| SMAXV |
SMAXV Sd, Pg, Zn.S |
|
Signed Maximum Reduction |
| SMIN |
SMIN Wd, Wn, Wm |
|
Signed Minimum |
| SMIN |
SMIN Zd.S, Pg/M, Zn.S, Zm.S |
|
Signed Minimum |
| SMINP |
SMINP Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Minimum Pairwise |
| SMINV |
SMINV Sd, Pg, Zn.S |
|
Signed Minimum Reduction |
| SMMLA |
SMMLA Zd.S, Zn.B, Zm.B |
|
Signed Int8 Matrix Multiply-Add |
| SMMLA |
SMMLA { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Signed Matrix Multiply-Add |
| SMOPA |
SMOPA ZA.S[Wv, <imm>], Pm.M, Pn.M, Zn.S, Zm.S |
|
Streaming SVE Matrix Outer Product Accumulate (Floating-point) |
| SMULH |
SMULH Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Multiply High |
| SMULLB |
SMULLB Zd.D, Zn.S, Zm.S |
|
Signed Multiply Long (Bottom) |
| SMULLT |
SMULLT Zd.D, Zn.S, Zm.S |
|
Signed Multiply Long (Top) |
| SPLICE |
SPLICE Zd.B, Pg, Zn.B, Zm.B |
|
Splice Two Vectors |
| SQABS |
SQABS Zd.S, Pg/M, Zn.S |
|
Signed Saturating Absolute |
| SQADD |
SQADD Zd.S, Zn.S, Zm.S |
|
Signed Saturating Add |
| SQDMLALB |
SQDMLALB Zd.D, Zn.S, Zm.S |
|
Signed Saturating Doubling Multiply-Add Long (Bottom) |
| SQDMLALT |
SQDMLALT Zd.D, Zn.S, Zm.S |
|
Signed Saturating Doubling Multiply-Add Long (Top) |
| SQDMLSLB |
SQDMLSLB Zd.D, Zn.S, Zm.S |
|
Signed Saturating Doubling Multiply-Subtract Long (Bottom) |
| SQDMLSLT |
SQDMLSLT Zd.D, Zn.S, Zm.S |
|
Signed Saturating Doubling Multiply-Subtract Long (Top) |
| SQDMULH |
SQDMULH Zd.S, Zn.S, Zm.S |
|
Signed Saturating Doubling Multiply High |
| SQNEG |
SQNEG Zd.S, Pg/M, Zn.S |
|
Signed Saturating Negate |
| SQRDCMLAH |
SQRDCMLAH Zd.H, Zn.B, Zm.B, #<rot> |
|
Saturating Complex Int Mul-Add High |
| SQRDMULH |
SQRDMULH Zd.S, Zn.S, Zm.S |
|
Signed Saturating Rounding Doubling Multiply High |
| SQRSHL |
SQRSHL Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Saturating Rounding Shift Left |
| SQRSHRNB |
SQRSHRNB Zd.B, Zn.H, #<imm> |
|
Signed Saturating Rounding Shift Right Narrow (Bottom) |
| SQRSHRNT |
SQRSHRNT Zd.B, Zn.H, #<imm> |
|
Signed Saturating Rounding Shift Right Narrow (Top) |
| SQRSHRUNB |
SQRSHRUNB Zd.B, Zn.H, #<imm> |
|
Signed Saturating Rounding Shift Right Unsigned Narrow (Bottom) |
| SQRSHRUNT |
SQRSHRUNT Zd.B, Zn.H, #<imm> |
|
Signed Saturating Rounding Shift Right Unsigned Narrow (Top) |
| SQSHRNB |
SQSHRNB Zd.B, Zn.H, #<imm> |
|
Signed Saturating Shift Right Narrow (Bottom) |
| SQSHRNT |
SQSHRNT Zd.B, Zn.H, #<imm> |
|
Signed Saturating Shift Right Narrow (Top) |
| SQSHRUNB |
SQSHRUNB Zd.B, Zn.H, #<imm> |
|
Signed Saturating Shift Right Unsigned Narrow (Bottom) |
| SQSHRUNT |
SQSHRUNT Zd.B, Zn.H, #<imm> |
|
Signed Saturating Shift Right Unsigned Narrow (Top) |
| SQSUB |
SQSUB Zd.S, Zn.S, Zm.S |
|
Signed Saturating Subtract |
| SRHADD |
SRHADD Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Rounding Halving Add |
| SRHSUB |
SRHSUB Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Rounding Halving Subtract |
| SRSHL |
SRSHL Zd.S, Pn/M, Zn.S, Zm.S |
|
Signed Rounding Shift Left |
| SSHLLB |
SSHLLB Zd.H, Zn.B, #<imm> |
|
Signed Shift Left Long (Bottom) |
| SSHLLT |
SSHLLT Zd.H, Zn.B, #<imm> |
|
Signed Shift Left Long (Top) |
| SSUBLB |
SSUBLB Zd.D, Zn.S, Zm.S |
|
Signed Subtract Long (Bottom) |
| SSUBLT |
SSUBLT Zd.D, Zn.S, Zm.S |
|
Signed Subtract Long (Top) |
| ST1B |
ST1B { Zt.S }, Pg, [Xn, Zm.S, UXTW] |
|
Scatter Store (Byte) |
| ST1D |
ST1D { Zt.D }, Pg, [Xn, Zm.D, LSL #3] |
|
Scatter Store (Double) |
| ST1H |
ST1H { Zt.S }, Pg, [Xn, Zm.S, UXTW #1] |
|
Scatter Store (Half) |
| ST1W |
ST1W { Zt.S }, Pg, [Xn, Zm.S, UXTW #2] |
|
Scatter Store (Word) |
| ST2B |
ST2B { Zt1.B, Zt2.B }, Pg/Z, [Xn] |
|
Store 2-element Structure (Byte) |
| ST2D |
ST2D { Zt1.D, Zt2.D }, Pg/Z, [Xn] |
|
Store 2-element Structure (Double) |
| ST2G |
ST2G Xt, [Xn, #<simm>] |
|
Store Two Tags |
| ST2H |
ST2H { Zt1.H, Zt2.H }, Pg/Z, [Xn] |
|
Store 2-element Structure (Half) |
| ST2W |
ST2W { Zt1.S, Zt2.S }, Pg/Z, [Xn] |
|
Store 2-element Structure (Word) |
| ST3B |
ST3B { Zt1.B, Zt2.B, Zt3.B }, Pg/Z, [Xn] |
|
Store 3-element Structure (Byte) |
| ST3D |
ST3D { Zt1.D, Zt2.D, Zt3.D }, Pg/Z, [Xn] |
|
Store 3-element Structure (Double) |
| ST3H |
ST3H { Zt1.H, Zt2.H, Zt3.H }, Pg/Z, [Xn] |
|
Store 3-element Structure (Half) |
| ST3W |
ST3W { Zt1.S, Zt2.S, Zt3.S }, Pg/Z, [Xn] |
|
Store 3-element Structure (Word) |
| ST4B |
ST4B { Zt1.B-Zt4.B }, Pg/Z, [Xn] |
|
Store 4-element Structure (Byte) |
| ST4D |
ST4D { Zt1.D-Zt4.D }, Pg/Z, [Xn] |
|
Store 4-element Structure (Double) |
| ST4H |
ST4H { Zt1.H-Zt4.H }, Pg/Z, [Xn] |
|
Store 4-element Structure (Half) |
| ST4W |
ST4W { Zt1.S-Zt4.S }, Pg/Z, [Xn] |
|
Store 4-element Structure (Word) |
| ST64B |
ST64B Ws, [Xn] |
|
Single-copy Atomic Store (64-byte) |
| ST64BV |
ST64BV Ws, Wd, [Xn] |
|
Atomic Store 64-byte with Status |
| STG |
STG Xt, [Xn, #<simm>] |
|
Store Allocation Tag |
| STGM |
STGM Xn, Xm |
|
Store Tag Multiple |
| STNT1B |
STNT1B { Zt.B }, Pg/Z, [Xn] |
|
Store Non-Temporal (Byte) |
| STNT1D |
STNT1D { Zt.D }, Pg/Z, [Xn] |
|
Store Non-Temporal (Double) |
| STNT1H |
STNT1H { Zt.H }, Pg/Z, [Xn] |
|
Store Non-Temporal (Half) |
| STNT1W |
STNT1W { Zt.S }, Pg/Z, [Xn] |
|
Store Non-Temporal (Word) |
| STR |
STR Zt, [Xn, #<imm>] |
|
Store Vector |
| STR (Pred) |
STR Pt, [Xn, #<imm>] |
|
Store Predicate |
| STR (Tile) |
STR ZA[<Wv>, <imm>], [Xn, #<imm>, MUL VL] |
|
Store Multiple Vectors from Tile |
| STZ2G |
STZ2G Xt, [Xn, #<simm>] |
|
Store Zero and Two Allocation Tags |
| STZGM |
STZGM Xn, Xm |
|
Store Tag and Zero Multiple |
| SUB |
SUB Zd.S, Pg/M, Zd.S, Zm.S |
|
Predicated Integer Subtract |
| SUB |
SUB { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Integer Subtract |
| SUBHNB |
SUBHNB Zd.B, Zn.H, Zm.H |
|
Subtract Narrow High (Bottom) |
| SUBHNT |
SUBHNT Zd.B, Zn.H, Zm.H |
|
Subtract Narrow High (Top) |
| SUBP |
SUBP Xd, Xn, Xm |
|
Subtract Pointer |
| SUDOT |
SUDOT Zd.S, Zn.B, Zm.B |
|
Signed-Unsigned Integer Dot Product |
| SUMOPA |
SUMOPA ZA.S[Wv, <imm>], Pm.M, Pn.M, Zn.S, Zm.S |
|
Streaming SVE Signed/Unsigned Integer Matrix Outer Product |
| SUNPKHI |
SUNPKHI Zd.H, Zn.B |
|
Signed Unpack High |
| SUNPKLO |
SUNPKLO Zd.H, Zn.B |
|
Signed Unpack Low |
| SXTB |
SXTB Zd.H, Pg/M, Zn.B |
|
Sign Extend Byte |
| SXTH |
SXTH Zd.S, Pg/M, Zn.H |
|
Sign Extend Halfword |
| SXTW |
SXTW Zd.D, Pg/M, Zn.S |
|
Sign Extend Word |
| TBL |
TBL Zd.B, Zn.B, Zm.B |
|
Table Lookup (Extended) |
| TBX |
TBX Zd.B, Zn.B, Zm.B |
|
Table Lookup Extend |
| TCANCEL |
TCANCEL #<imm> |
|
Transaction Cancel |
| TCOMMIT |
TCOMMIT |
|
Transaction Commit |
| TRN1 |
TRN1 Zd.S, Zn.S, Zm.S |
|
Transpose Vectors (Part 1) |
| TRN2 |
TRN2 Zd.S, Zn.S, Zm.S |
|
Transpose Vectors (Part 2) |
| TSTART |
TSTART Xd |
|
Transaction Start |
| UABA |
UABA Zd.S, Zn.S, Zm.S |
|
Unsigned Absolute Difference Accumulate |
| UABD |
UABD Zd.S, Pg/M, Zn.S, Zm.S |
|
Unsigned Absolute Difference |
| UADDLB |
UADDLB Zd.D, Zn.S, Zm.S |
|
Unsigned Add Long (Bottom) |
| UADDLT |
UADDLT Zd.D, Zn.S, Zm.S |
|
Unsigned Add Long (Top) |
| UADDV |
UADDV Dd, Pg, Zn.S |
|
Unsigned Add Reduction |
| UCLAMP |
UCLAMP Zd.S, Zn.S, Zm.S |
|
Unsigned Clamp |
| UCVTF |
UCVTF Zd.S, Pg/M, Zn.S |
|
Unsigned Int to Float Conversion |
| UDIV |
UDIV Zd.S, Pg/M, Zd.S, Zm.S |
|
Unsigned Integer Divide |
| UDIVR |
UDIVR Zd.S, Pg/M, Zd.S, Zm.S |
|
Unsigned Integer Divide Reverse |
| UHADD |
UHADD Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Halving Add |
| UHSUB |
UHSUB Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Halving Subtract |
| UMAX |
UMAX Wd, Wn, Wm |
|
Unsigned Maximum |
| UMAX |
UMAX Zd.S, Pg/M, Zn.S, Zm.S |
|
Unsigned Maximum |
| UMAXP |
UMAXP Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Maximum Pairwise |
| UMAXV |
UMAXV Sd, Pg, Zn.S |
|
Unsigned Maximum Reduction |
| UMIN |
UMIN Wd, Wn, Wm |
|
Unsigned Minimum |
| UMIN |
UMIN Zd.S, Pg/M, Zn.S, Zm.S |
|
Unsigned Minimum |
| UMINP |
UMINP Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Minimum Pairwise |
| UMINV |
UMINV Sd, Pg, Zn.S |
|
Unsigned Minimum Reduction |
| UMMLA |
UMMLA Zd.S, Zn.B, Zm.B |
|
Unsigned Int8 Matrix Multiply-Add |
| UMMLA |
UMMLA { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Unsigned Matrix Multiply-Add |
| UMULH |
UMULH Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Multiply High |
| UMULLB |
UMULLB Zd.D, Zn.S, Zm.S |
|
Unsigned Multiply Long (Bottom) |
| UMULLT |
UMULLT Zd.D, Zn.S, Zm.S |
|
Unsigned Multiply Long (Top) |
| UQADD |
UQADD Zd.S, Zn.S, Zm.S |
|
Unsigned Saturating Add |
| UQRSHL |
UQRSHL Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Saturating Rounding Shift Left |
| UQRSHRNB |
UQRSHRNB Zd.B, Zn.H, #<imm> |
|
Unsigned Saturating Rounding Shift Right Narrow (Bottom) |
| UQRSHRNT |
UQRSHRNT Zd.B, Zn.H, #<imm> |
|
Unsigned Saturating Rounding Shift Right Narrow (Top) |
| UQSHRNB |
UQSHRNB Zd.B, Zn.H, #<imm> |
|
Unsigned Saturating Shift Right Narrow (Bottom) |
| UQSHRNT |
UQSHRNT Zd.B, Zn.H, #<imm> |
|
Unsigned Saturating Shift Right Narrow (Top) |
| UQSUB |
UQSUB Zd.S, Zn.S, Zm.S |
|
Unsigned Saturating Subtract |
| URECPE |
URECPE Zd.S, Zn.S |
|
Unsigned Reciprocal Estimate |
| URHADD |
URHADD Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Rounding Halving Add |
| URHSUB |
URHSUB Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Rounding Halving Subtract |
| URSHL |
URSHL Zd.S, Pn/M, Zn.S, Zm.S |
|
Unsigned Rounding Shift Left |
| URSQRTE |
URSQRTE Zd.S, Zn.S |
|
Unsigned Reciprocal Sqrt Estimate |
| USDOT |
USDOT Zd.S, Zn.B, Zm.B |
|
Unsigned-Signed Integer Dot Product |
| USHLLB |
USHLLB Zd.H, Zn.B, #<imm> |
|
Unsigned Shift Left Long (Bottom) |
| USHLLT |
USHLLT Zd.H, Zn.B, #<imm> |
|
Unsigned Shift Left Long (Top) |
| USMMLA |
USMMLA Zd.S, Zn.B, Zm.B |
|
Mixed Sign Int8 Matrix Multiply-Add |
| USMMLA |
USMMLA { Zd1.S-Zd2.S }, { Zn1.S-Zn2.S }, { Zm1.S-Zm2.S } |
|
Multi-vector Mixed Matrix Multiply-Add |
| USUBLB |
USUBLB Zd.D, Zn.S, Zm.S |
|
Unsigned Subtract Long (Bottom) |
| USUBLT |
USUBLT Zd.D, Zn.S, Zm.S |
|
Unsigned Subtract Long (Top) |
| UUNPKHI |
UUNPKHI Zd.H, Zn.B |
|
Unsigned Unpack High |
| UUNPKLO |
UUNPKLO Zd.H, Zn.B |
|
Unsigned Unpack Low |
| UXTB |
UXTB Zd.H, Pg/M, Zn.B |
|
Unsigned Extend Byte |
| UXTH |
UXTH Zd.S, Pg/M, Zn.H |
|
Unsigned Extend Halfword |
| UXTW |
UXTW Zd.D, Pg/M, Zn.S |
|
Unsigned Extend Word |
| UZP1 |
UZP1 Zd.S, Zn.S, Zm.S |
|
Unzip Vectors (Part 1) |
| UZP2 |
UZP2 Zd.S, Zn.S, Zm.S |
|
Unzip Vectors (Part 2) |
| WFET |
WFET Xn |
|
Wait For Event with Timeout |
| WFIT |
WFIT Xn |
|
Wait For Interrupt with Timeout |
| WHILEGE |
WHILEGE Pd.B, Xn, Xm |
|
While Greater or Equal (Extended) |
| WHILEGT |
WHILEGT Pd.B, Xn, Xm |
|
While Greater Than (Extended) |
| WHILEHS |
WHILEHS Pd.B, Xn, Xm |
|
While Higher or Same (Unsigned) |
| WHILELE |
WHILELE Pd.B, Xn, Xm |
|
While Less or Equal (Extended) |
| WHILELO |
WHILELO Pd.B, Xn, Xm |
|
While Lower (Unsigned) |
| WHILELT |
WHILELT Pd.B, Xn, Xm |
|
While Less Than (Extended) |
| WHILERW |
WHILERW Pd.B, Xn, Xm |
|
While Free of Read-After-Write |
| WHILEWR |
WHILEWR Pd.B, Xn, Xm |
|
While free of read-after-write conflicts |
| WRFFR |
WRFFR Pn.B |
|
Write First-Fault Register |
| XAR |
XAR Zd.B, Zn.B, Zm.B, #<imm> |
|
Exclusive OR and Rotate |
| XNOR |
XNOR Pd.B, Pg/Z, Pn.B, Pm.B |
|
Predicate XNOR |
| ZERO |
ZERO { <tile_list> } |
|
Zero a list of 64-bit element tiles |
| ZIP1 |
ZIP1 Zd.S, Zn.S, Zm.S |
|
Zip Vectors (Part 1) |
| ZIP2 |
ZIP2 Zd.S, Zn.S, Zm.S |
|
Zip Vectors (Part 2) |
| adclb |
ADCLB <Zd>.S, <Zn>.S, <Zm>.S |
SVE2 Math |
Adds bottom halves with carry. |
| adclt |
ADCLT <Zd>.S, <Zn>.S, <Zm>.S |
SVE2 Math |
Adds top halves with carry. |
| add |
ADD { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Multi-vector |
Adds two or four vectors to two or four accumulators (SME2). |
| addhnb |
ADDHNB <Zd>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2 Narrowing |
Adds wide elements, narrows result to bottom half. |
| addhnb |
ADDHNB <Zd>.B, <Zn>.H, <Zm>.H |
SVE2 Math |
Adds wide elements, narrows, and stores in bottom half. |
| addhnt |
ADDHNT <Zd>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2 Narrowing |
Adds wide elements, narrows result to top half. |
| addhnt |
ADDHNT <Zd>.B, <Zn>.H, <Zm>.H |
SVE2 Math |
Adds wide elements, narrows, and stores in top half. |
| addpt |
ADDPT <Xd|SP>, <Xn|SP>, <Xm> |
Data Processing |
Adds offset to pointer with tag check (Checked Pointer Arithmetic). |
| aesd |
AESD <Zdn>.B, <Zm>.B |
SVE2 Crypto |
AES single round decryption on SVE vectors. |
| aese |
AESE <Zdn>.B, <Zm>.B |
SVE2 Crypto |
AES single round encryption on SVE vectors. |
| bcax |
BCAX <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D |
SVE2 Bitwise |
Calculates (Zn AND NOT Zm) XOR Zk. |
| bdep |
BDEP <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Bitwise |
Deposits bits from source to destination based on a mask (Scatter bits). |
| bdep |
BDEP <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Bitwise |
Scatters bits from LSBs of source to positions specified by mask. |
| bext |
BEXT <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Bitwise |
Extracts bits from source to destination based on a mask (Gather bits). |
| bext |
BEXT <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Bitwise |
Gathers bits from source based on mask positions to LSBs. |
| bfmopa |
BFMOPA <ZAda>.S, <Zn>.H, <Zm>.H |
SME2 Matrix |
BFloat16 outer product accumulate (SME2). |
| bgrp |
BGRP <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Bitwise |
Groups bits from source to left/right based on a mask. |
| bgrp |
BGRP <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Bitwise |
Groups bits from source based on mask (0s to left, 1s to right). |
| brbinj |
BRBINJ <Xt> |
System |
Injects a record into the Branch Record Buffer. |
| brbto |
BRBTO |
System |
Manages overflow behavior for the Branch Record Buffer. |
| bsl |
BSL <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D |
SVE2 Bitwise |
Bitwise select using (Zdn AND Zm) OR (NOT Zdn AND Zk). |
| bsl1n |
BSL1N <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D |
SVE2 Bitwise |
Bitwise select with first operand inverted. |
| bsl2n |
BSL2N <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D |
SVE2 Bitwise |
Bitwise select with second operand inverted. |
| cadd |
CADD <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<rot> |
SVE2 Complex |
Performs complex integer addition with rotation. |
| cdot |
CDOT <Zdn>.<T>, <Zn>.<T>, <Zm>.<T>, #<rot> |
SVE2 Complex |
Computes complex integer dot product. |
| clastb |
CLASTB <Rd>, <Pg>, <Rd>, <Zn>.<T> |
SVE Reduction |
Extracts the last active element (SVE). |
| cmla |
CMLA <Zdn>.<T>, <Zn>.<T>, <Zm>.<T>, #<rot> |
SVE2 Complex |
Computes complex integer multiply-accumulate. |
| cmla |
CMLA <Zda>.<T>, <Zn>.<T>, <Zm>.<T>, #<rot> |
SVE2 Complex |
Performs complex integer multiply-accumulate with rotation. |
| cpyfe |
CPYFE [<Xd>]!, [<Xn>]!, <Xm>! |
MOPS |
Optimized memory copy epilogue (Forward). |
| cpyfe |
CPYFE [<Wd>|SP]!, [<Wn>|SP]!, <Xn>! |
MOPS |
Final step of a hardware-accelerated memcpy (Forward direction). |
| cpyfm |
CPYFM [<Xd>]!, [<Xn>]!, <Xm>! |
MOPS |
Optimized memory copy main loop (Forward). |
| cpyfm |
CPYFM [<Wd>|SP]!, [<Wn>|SP]!, <Xn>! |
MOPS |
Main loop of a hardware-accelerated memcpy (Forward direction). |
| cpyfp |
CPYFP [<Xd>]!, [<Xn>]!, <Xm>! |
MOPS |
Optimized memory copy prologue (Forward). |
| cpyfp |
CPYFP [<Wd>|SP]!, [<Wn>|SP]!, <Xn>! |
MOPS |
First step of a hardware-accelerated memcpy (Forward direction). |
| dup |
DUP <Zd>.<T>, <Rn|SP> |
SVE Permute |
Broadcasts a scalar value to all vector elements. |
| dvmp |
DVMP <Xt> |
System |
Broadcasts permission checking for data values (Realm). |
| eor3 |
EOR3 <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D |
SVE2 Bitwise |
Exclusive OR of three vectors. |
| f8cvt |
F8CVT <Zd>.H, <Zn>.B, #<imm> |
FP8 |
Converts between FP8 and other formats. |
| f8mopa |
F8MOPA <ZAda>.S, <Zn>.B, <Zm>.B |
SME2 FP8 |
Outer product of FP8 vectors accumulating to FP32. |
| fadd |
FADD { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Float |
Adds 2 or 4 FP vectors. |
| fclamp |
FCLAMP <Zdn>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2.1 |
Clamps floating-point elements between min and max (SVE2.1). |
| fdiv |
FDIV <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> |
SVE Float |
Floating-point division (vector). |
| fmax |
FMAX { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Float |
Maximum of 2 or 4 FP vectors. |
| fmin |
FMIN { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Float |
Minimum of 2 or 4 FP vectors. |
| fmla |
FMLA { <Zd1>.S-<Zd4>.S }, { <Zn1>.S-<Zn4>.S }, { <Zm1>.S-<Zm4>.S } |
SME2 Multi-vector |
Fused multiply-add on 2 or 4 vectors (SME2). |
| fmls |
FMLS { <Zd1>.S-<Zd4>.S }, { <Zn1>.S-<Zn4>.S }, { <Zm1>.S-<Zm4>.S } |
SME2 Multi-vector |
Fused multiply-subtract on 2 or 4 vectors (SME2). |
| fmopa |
FMOPA <ZAda>.S, <Pg>/M, <Pg>/M, <Zn>.S, <Zm>.S |
SME Arithmetic |
Computes (Zn x Zm) + ZA (Outer Product) for floats. |
| fmopa |
FMOPA <ZAda>.S, <Zn>.S, <Zm>.S |
SME2 Matrix |
Non-widening floating-point outer product (SME2). |
| fmops |
FMOPS <ZAda>.S, <Pg>/M, <Pg>/M, <Zn>.S, <Zm>.S |
SME Arithmetic |
Computes ZA - (Zn x Zm) (Outer Product). |
| fmul |
FMUL { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Float |
Multiplies 2 or 4 FP vectors. |
| frintn |
FRINTN <Zd>.<T>, <Pg>/M, <Zn>.<T> |
SVE Float |
Rounds float to integer (Nearest Even) (vector). |
| fsqrt |
FSQRT <Zd>.<T>, <Pg>/M, <Zn>.<T> |
SVE Float |
Floating-point square root (vector). |
| fsub |
FSUB { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Float |
Subtracts 2 or 4 FP vectors. |
| gcspushm |
GCSPUSHM |
System |
Pushes the Link Register (LR) onto the Guarded Control Stack. |
| gcsstr |
GCSSTR <Xd>, [<Xn|SP>] |
Load/Store |
Stores a value to the GCS (Control Flow Integrity). |
| histcnt |
HISTCNT <Zd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> |
SVE2 Histogram |
Counts active elements that match specific bit patterns (Histogram acceleration). |
| histcnt |
HISTCNT <Zd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> |
SVE2 Histogram |
Counts matching elements in a vector to build a histogram. |
| histseg |
HISTSEG <Zd>.B, <Zn>.B, <Zm>.B |
SVE2 Histogram |
Counts matching elements in segments. |
| insr |
INSR <Zdn>.<T>, <Rm> |
SVE Permute |
Shifts vector and inserts scalar at element 0. |
| ld1b |
LD1B { <Zt>.B }, <Pg>/Z, [<Xn|SP>, <Zm>.S, SXTW] |
SVE Gather |
Loads bytes from non-contiguous memory addresses specified by a vector index. |
| ld1d |
LD1D { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #3] |
SVE Gather |
Loads doublewords from non-contiguous memory addresses. |
| ld1h |
LD1H { <Zt>.H }, <Pg>/Z, [<Xn|SP>, <Zm>.S, SXTW #1] |
SVE Gather |
Loads halfwords from non-contiguous memory addresses. |
| ld1w |
LD1W { <Zt>.S }, <Pg>/Z, [<Xn|SP>, <Zm>.S, SXTW #2] |
SVE Gather |
Loads words from non-contiguous memory addresses. |
| ld1w |
LD1W { <ZAdaH>.S[<slice>, #<imm>] }, <Pg>/Z, [<Xn|SP>] |
SME Load |
Loads a horizontal slice (row) of a tile from memory. |
| ld1w |
LD1W { <ZAdaV>.S[<slice>, #<imm>] }, <Pg>/Z, [<Xn|SP>] |
SME Load |
Loads a vertical slice (column) of a tile from memory. |
| ld1w |
LD1W { <Zd1>.S-<Zd4>.S }, [<Xn|SP>] |
SME2 Load |
Loads multiple vectors (2 or 4) from memory (SME2). |
| ldnt1b |
LDNT1B { <Zt>.B }, <Pg>/Z, [<Xn|SP>, <Zm>, LSL #0] |
SVE2 Load |
Loads bytes hinting non-temporal (no cache alloc). |
| ldsza |
LDSZA <ZA>.<T>V[<Ws>, <imm>], [<Xn|SP>, <Xm>, LSL <scale>] |
SME Load |
Loads a tile slice from memory directly into ZA. |
| luti2 |
LUTI2 <Zd>.B, ZT0, <Zn>.B[<index>] |
SME2 LUT |
Looks up values in ZT0 table using 2-bit indices (SME2). |
| luti4 |
LUTI4 <Zd>.B, ZT0, <Zn>.B[<index>] |
SME2 LUT |
Looks up values in ZT0 table using 4-bit indices (SME2). |
| maddpt |
MADDPT <Xd>, <Xn>, <Xm>, <Xa> |
Data Processing |
Calculates Ptr + (A * B) with tag check. |
| match |
MATCH <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> |
SVE2 Match |
Detects if elements in Zn match any element in Zm (String matching). |
| match |
MATCH <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> |
SVE2 String |
Detects matches between vector elements and sets a predicate (String processing). |
| mova |
MOVA <ZA>.<T>H[<Ws>, <imm>], <Pg>/M, <Zn>.<T> |
SME Move |
Moves an SVE vector into a horizontal slice of a ZA tile. |
| mova |
MOVA <ZA>.<T>V[<Ws>, <imm>], <Pg>/M, <Zn>.<T> |
SME Move |
Moves an SVE vector into a vertical slice of a ZA tile. |
| mova |
MOVA <Zd>.<T>, <Pg>/M, <ZA>.<T>H[<Ws>, <imm>] |
SME Move |
Moves a horizontal slice of a ZA tile into an SVE vector. |
| mova |
MOVA <Zd>.<T>, <Pg>/M, <ZA>.<T>V[<Ws>, <imm>] |
SME Move |
Moves a vertical slice of a ZA tile into an SVE vector. |
| movt |
MOVT { <Zd1>.H-<Zd2>.H }, { <Zn1>.H-<Zn2>.H } |
SME2 Move |
Moves and transposes data between 2/4 vectors (SME2). |
| msubpt |
MSUBPT <Xd>, <Xn>, <Xm>, <Xa> |
Data Processing |
Calculates Ptr - (A * B) with tag check. |
| mullb |
MULLB <Zd>.H, <Zn>.B, <Zm>.B |
SVE2 Math |
Multiplies bottom elements of vectors, producing wide result. |
| mullt |
MULLT <Zd>.H, <Zn>.B, <Zm>.B |
SVE2 Math |
Multiplies top elements of vectors, producing wide result. |
| nbsl |
NBSL <Zdn>.D, <Zdn>.D, <Zm>.D, <Zk>.D |
SVE2 Bitwise |
Inverted result of bitwise select. |
| nmatch |
NMATCH <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> |
SVE2 Match |
Detects if elements in Zn match *none* of the elements in Zm. |
| nmatch |
NMATCH <Pd>.<T>, <Pg>/Z, <Zn>.<T>, <Zm>.<T> |
SVE2 String |
Detects mismatches between vector elements (String processing). |
| pmul |
PMUL <Zdn>.B, <Zdn>.B, <Zm>.B |
SVE2 Crypto |
Performs polynomial multiplication (GF(2) arithmetic). |
| pmullb |
PMULLB <Zdn>.Q, <Zn>.D, <Zm>.D |
SVE2 Crypto |
Polynomial multiply of bottom 64-bits (Crypto/CRC). |
| pmullb |
PMULLB <Zda>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2 Poly |
Polynomial multiply of even elements producing wide result. |
| pmullt |
PMULLT <Zdn>.Q, <Zn>.D, <Zm>.D |
SVE2 Crypto |
Polynomial multiply of top 64-bits (Crypto/CRC). |
| pmullt |
PMULLT <Zda>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2 Poly |
Polynomial multiply of odd elements producing wide result. |
| psel |
PSEL <Pd>, <Pn>, <Pm>.<T>[<imm>] |
SME2 |
Selects a predicate register based on a boolean condition (SME2). |
| rax1 |
RAX1 <Zdn>.D, <Zn>.D, <Zm>.D |
SVE2 Crypto |
Rotates source by 1 and XORs (SHA3 acceleration). |
| rdsvl |
RDSVL <Xd>, #<imm> |
SME General |
Reads the current vector length in streaming mode. |
| revd |
REVD <Zd>.<T>, <Pg>/M, <Zn>.<T> |
SVE2 |
Reverses 64-bit doublewords within 128-bit quadwords (SVE2). |
| rmpadjust |
RMPADJUST <Xt>, <Xn>, <Xm> |
System |
Adjusts the RMP entry for a physical address (Realm Management). |
| rmpinit |
RMPINIT |
System |
Initializes the Realm Management Pointer table. |
| rmpread |
RMPREAD <Xt>, <Xn> |
System |
Reads the RMP entry for a physical address. |
| rsubhnb |
RSUBHNB <Zd>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2 Narrowing |
Subtracts, rounds, and narrows (Bottom half). |
| rsubhnt |
RSUBHNT <Zd>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2 Narrowing |
Subtracts, rounds, and narrows (Top half). |
| saddlb |
SADDLB <Zd>.H, <Zn>.B, <Zm>.B |
SVE2 Math |
Signed add of bottom halves, widening. |
| sclamp |
SCLAMP <Zdn>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2.1 |
Clamps signed integer elements between min and max (SVE2.1). |
| sdiv |
SDIV <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> |
SVE Math |
Signed integer division (vector). |
| sel |
SEL <Zd>.<T>, <Pg>, <Zn>.<T>, <Zm>.<T> |
SVE Permute |
Selects elements from two vectors based on predicate. |
| sete |
SETE [<Xd>]!, <Xn>!, <Xm> |
MOPS |
Optimized memory set epilogue. |
| sete |
SETE [<Wd>|SP]!, <Xn>!, <Xm> |
MOPS |
Final step of a hardware-accelerated memset. |
| setm |
SETM [<Xd>]!, <Xn>!, <Xm> |
MOPS |
Optimized memory set main loop. |
| setm |
SETM [<Wd>|SP]!, <Xn>!, <Xm> |
MOPS |
Main loop of a hardware-accelerated memset. |
| setp |
SETP [<Xd>]!, <Xn>!, <Xm> |
MOPS |
Optimized memory set prologue. |
| setp |
SETP [<Wd>|SP]!, <Xn>!, <Xm> |
MOPS |
First step of a hardware-accelerated memset. |
| sm4e |
SM4E <Zdn>.S, <Zm>.S |
SVE2 Crypto |
SM4 block cipher encryption on SVE vectors. |
| smax |
SMAX { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Int |
Signed maximum of 2 or 4 vectors. |
| smin |
SMIN { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Int |
Signed minimum of 2 or 4 vectors. |
| smopa |
SMOPA <ZAda>.S, <Pg>/M, <Pg>/M, <Zn>.B, <Zm>.B |
SME Arithmetic |
Computes outer product for signed integers. |
| smopa |
SMOPA <ZAda>.S, <Zn>.S, <Zm>.S |
SME2 Matrix |
Non-widening signed integer outer product (SME2). |
| smstart |
SMSTART { <mode> } |
SME Control |
Enables Streaming SVE (SS) and ZA storage (Matrix mode). |
| smstop |
SMSTOP { <mode> } |
SME Control |
Disables Streaming SVE and/or ZA storage. |
| splice |
SPLICE <Zdn>.<T>, <Pg>, <Zdn>.<T>, <Zm>.<T> |
SVE Permute |
Splices two vectors based on a predicate. |
| sqdmlalbt |
SQDMLALBT <Zd>.H, <Zn>.B, <Zm>.B |
SVE2 Math |
Complex integer multiply-accumulate. |
| sqdmlaltb |
SQDMLALTB <Zd>.H, <Zn>.B, <Zm>.B |
SVE2 Math |
Complex integer multiply-accumulate. |
| sqdmulh |
SQDMULH { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Int |
Saturating doubling multiply high on 2 or 4 vectors. |
| sqrdmulh |
SQRDMULH <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Int |
Saturating, rounding, doubling high multiply. |
| sqrdmulh |
SQRDMULH <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T> |
SVE2 Integer Binary |
Multiplies, doubles, rounds, and returns high half (Fixed point math). |
| sqrshl |
SQRSHL <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> |
SVE2 Shift |
Saturating, rounding left shift by vector. |
| st1b |
ST1B { <Zt>.B }, <Pg>, [<Xn|SP>, <Zm>.S, SXTW] |
SVE Scatter |
Stores bytes to non-contiguous memory addresses. |
| st1d |
ST1D { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #3] |
SVE Scatter |
Stores doublewords to non-contiguous memory addresses. |
| st1h |
ST1H { <Zt>.H }, <Pg>, [<Xn|SP>, <Zm>.S, SXTW #1] |
SVE Scatter |
Stores halfwords to non-contiguous memory addresses. |
| st1w |
ST1W { <Zt>.S }, <Pg>, [<Xn|SP>, <Zm>.S, SXTW #2] |
SVE Scatter |
Stores words to non-contiguous memory addresses. |
| st1w |
ST1W { <ZAdaH>.S[<slice>, #<imm>] }, <Pg>, [<Xn|SP>] |
SME Store |
Stores a horizontal slice (row) of a tile to memory. |
| st1w |
ST1W { <ZAdaV>.S[<slice>, #<imm>] }, <Pg>, [<Xn|SP>] |
SME Store |
Stores a vertical slice (column) of a tile to memory. |
| st1w |
ST1W { <Zd1>.S-<Zd4>.S }, [<Xn|SP>] |
SME2 Store |
Stores multiple vectors (2 or 4) to memory (SME2). |
| stnt1b |
STNT1B { <Zt>.B }, <Pg>, [<Xn|SP>, <Zm>, LSL #0] |
SVE2 Store |
Stores bytes hinting non-temporal. |
| stsza |
STSZA <ZA>.<T>V[<Ws>, <imm>], [<Xn|SP>, <Xm>, LSL <scale>] |
SME Store |
Stores a tile slice from ZA directly to memory. |
| sub |
SUB { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Multi-vector |
Subtracts two or four vectors from accumulators (SME2). |
| subhnb |
SUBHNB <Zd>.B, <Zn>.H, <Zm>.H |
SVE2 Math |
Subtracts wide elements, narrows, and stores in bottom half. |
| subhnt |
SUBHNT <Zd>.B, <Zn>.H, <Zm>.H |
SVE2 Math |
Subtracts wide elements, narrows, and stores in top half. |
| subpt |
SUBPT <Xd|SP>, <Xn|SP>, <Xm> |
Data Processing |
Subtracts offset from pointer with tag check (Checked Pointer Arithmetic). |
| sumopa |
SUMOPA <ZAda>.S, <Zn>.S, <Zm>.S |
SME2 Matrix |
Outer product of Signed x Unsigned integers (SME2). |
| tbl |
TBL <Zdn>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE Permute |
Vector table lookup (SVE version of TBL). |
| tbx |
TBX <Zdn>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE Permute |
Vector table extension (SVE version of TBX). |
| tcancel |
TCANCEL #<imm> |
System |
Cancels the current transaction. |
| tcommit |
TCOMMIT |
System |
Commits the current memory transaction. |
| tlbi |
TLBI RIPAS2E1, <Xt> |
System |
Invalidates TLB entries for a Realm Intermediate Physical Address. |
| tlbi |
TLBI RVAE1, <Xt> |
System |
Invalidates TLB entries by Realm Physical Address. |
| tstart |
TSTART <Xt> |
System |
Starts a new memory transaction (TME). |
| ttest |
TTEST <Xt> |
System |
Tests the transaction depth. |
| uclamp |
UCLAMP <Zdn>.<T>, <Zn>.<T>, <Zm>.<T> |
SVE2.1 |
Clamps unsigned integer elements between min and max (SVE2.1). |
| udiv |
UDIV <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> |
SVE Math |
Unsigned integer division (vector). |
| umax |
UMAX { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Int |
Unsigned maximum of 2 or 4 vectors. |
| umin |
UMIN { <Zd1>.S-<Zd2>.S }, { <Zn1>.S-<Zn2>.S }, { <Zm1>.S-<Zm2>.S } |
SME2 Int |
Unsigned minimum of 2 or 4 vectors. |
| umopa |
UMOPA <ZAda>.S, <Pg>/M, <Pg>/M, <Zn>.B, <Zm>.B |
SME Arithmetic |
Computes outer product for unsigned integers. |
| umopa |
UMOPA <ZAda>.S, <Zn>.S, <Zm>.S |
SME2 Matrix |
Non-widening unsigned integer outer product (SME2). |
| uqrshl |
UQRSHL <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <Zm>.<T> |
SVE2 Shift |
Unsigned saturating, rounding left shift. |
| usmopa |
USMOPA <ZAda>.S, <Zn>.S, <Zm>.S |
SME2 Matrix |
Outer product of Unsigned x Signed integers (SME2). |
| whilele |
WHILELE <Pd>.<T>, <Xn>, <Xm> |
SVE Predicate |
Generates a predicate for a loop (start <= end). |
| whilelt |
WHILELT <Pd>.<T>, <Xn>, <Xm> |
SVE Predicate |
Generates a predicate for a loop (start < end). |
| whilerw |
WHILERW <Pd>.<T>, <Xn>, <Xm> |
SVE2 Loop |
Generates predicates to avoid data races (Memory Consistency). |
| whilerw |
WHILERW <Pd>.<T>, <Xn>, <Xm> |
SVE2 Predicate |
Generates a predicate for concurrent read/write loop iterations. |
| whilewr |
WHILEWR <Pd>.<T>, <Xn>, <Xm> |
SVE2 Loop |
Generates predicates to avoid write-after-read hazards. |
| whilewr |
WHILEWR <Pd>.<T>, <Xn>, <Xm> |
SVE2 Predicate |
Generates a predicate for concurrent write/read loop iterations. |
| xar |
XAR <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<imm> |
SVE2 Bitwise |
Performs XOR followed by a right rotation (used in SHA-3/SM3). |
| xar |
XAR <Zdn>.<T>, <Zdn>.<T>, <Zm>.<T>, #<imm> |
SVE2 Bitwise |
XORs two vectors then rotates the result. |
| zero |
ZERO { <mask> } |
SME Control |
Zeros the entire ZA matrix array or specific tiles. |
| zero |
ZERO ZT0 |
SME2 Control |
Zeros the ZT0 lookup table register (SME2). |