{"api_version":"1","snapshot":"2026-10-08","licence":"CC0-1.0","architecture":"x86","mnemonic":"add","slug":"add","records":[{"page":"https://instructionsets.com/x86/add/","record":{"mnemonic":"add","architecture":"x86","full_name":"Add","summary":"Adds src to dest and stores result in dest.","syntax":"ADD r/m, r","pseudocode":"result ← dest + src;\nOF ← overflow_occurred(dest, src, result);\nSF ← (result < 0);\nZF ← (result == 0);\nAF ← carry_from_bit(3);\nPF ← parity(result);\nCF ← carry_out;\ndest ← result;","example":"ADD EAX, EBX  ; Add EBX to EAX\nADD [EAX], 5  ; Add 5 to the 32-bit integer at address EAX","encoding":{"format":"Legacy","hex_opcode":"01","length":"2+","visual_parts":[],"binary_pattern":"01","bit_positions":"+0"},"extension":"Base","operands":[{"name":"dest","type":"r/m","desc":"Register or memory operand"},{"name":"src","type":"r","desc":"General-purpose register"}],"description":"Adds the source operand to the destination operand and stores the result in the destination; the sum is computed modulo 2^(operand size). Sets OF, SF, ZF, AF, CF, and PF based on the result. Available in 16-bit, 32-bit, and 64-bit forms; operand size is determined by the prefix and REX.W in 64-bit mode."}}]}